The present invention relates to a latch circuit used as a register, for example, between a central processing unit (CPU) and a high-speed memory in a computer system.
The latch circuit according to the present invention is advantageous against external noise, especially alpha rays from a ceramic package of an integrated circuit (IC).
As is well know, alpha rays are radiated from IC ceramic packages; when these alpha rays strike the transistors which constitute the IC, spike noise is mainly generated from the collectors of the transistors in the form of a minus peak. This spike noise causes errors during logic operations of the latch circuit. Namely, when the latch circuit is maintained in a "hold mode" which has two states, i.e., a high level state and a low level state, in each of the output lines, the level which should be maintained high is changed to the low level by this spike noise, so that the changed level state is latched and is maintained.
There are, in general, two ways to solve this spike noise caused by the alpha rays. First, it is possible to increase the logic amplitude between the high level and the low level in the logic operation to an extent great enough to overcome the influence of spike noise. Second, it is possible to provide a capacitor in the latch circuit in order to eliminate the spike noise by charging up the minus peak voltage.
The former technique, however, results in a lower switching speed because of the longer time taken for the change between the high level and the low level. The latter technique also results in a slower speed, in this case, due to the longer time for charging and discharging of the capacitor.